ANSI EIA-364-107:2000 pdf download.Eye Pattern and Jitter Test Procedure for Electrical Connectors, Sockets,Cable Assemblies or Interconnection Systems.
This procedure is applicable to electrical connectors, cable assemblies, or interconnection systems.
1.2 Object
This standard describes methods for measuring an eye pattern response and jitter in the time domain.
1.3 Definitions
1.3.1 Eye pattern
An oscilloscope display of synchronized pseudo-random digital data (signal amplitude versus time), showing the superposition of accumulated output waveforms.
1.3.2 Jitter
The difference between the earliest and latest times at which a signal crosses a specified reference voltage level.
1.3.3 Bit period
The time interval between the successive like edges (rise to rise or fall to fall) of the clock signal. This is the reciprocal of the clock frequency.
1.3.4 Skew
The difference in propagation delay between two signal paths.
1.3.5 Measurement system rise time.
Rise time measured with fixture in place, without the specimen, and with filtering
(or normalization). Rise time is typically measured from 10% to 90% levels.
2 Test resources
2.1 Equipment
2.1.1 High speed pattern generator with clock output capable of producing a signal with specified rise and fall times and data pattern.
2.1.2 Signal analyzer with external clock input capable of infinite persistence display. This is typically a digital sampling oscilloscope (DSO) with sampling head. It is preferred that the DSO have masking capability.
NOTE Make sure not to exceed the maximum allowable input ratings of the oscilloscope input ports. This will prevent costly damage and provide reliable measurements. Even signal excursions that are within the maximum allowable signal levels of the oscilloscope can result in unstable eye pattern responses.
2.2 Fixture
2.2.1 The test fixtures shall provide for proper signal(s) and ground pattern(s) and, if required, proper termination of adjacent signal lines.
2.2.2 When measuring a differential response, make sure that the test fixtures and test cables are delay matched to minimize the skew. It is recommended that the skew of the test cables and fixtures be < 5% of the bit period.
3 Test specimen
3.1 Description
For this test procedure the test specimen shall be as follows:
3.1.1 Separable connectors
A mated connector pair.
3.1.2 Cable assembly
Assembled connectors and cables, and mated connectors.
3.1.3 Sockets
A socket and test device or a socket and pluggable header adapter.
4 Test procedure
4.1 General
4.1.1 Allow sufficient time for the equipment to warm-up and stabilize (according to the equipment manufacturer’s instructions).
4.1.2 If the specimen does not have a single-ended characteristic impedance of 50 or a differential impedance of 100 , impedance matching pads should be used. The required values are calculated using the equations in figures A. 1 or A.2 of annex A. Use standard resistors having values nearest the values calculated from these equations.ANSI EIA-364-107 pdf download.